1. Transistors at High Frequency

The h-parameter and low-frequency hybrid-π model from Chapter 1 captured the BJT's small-signal behavior beautifully, but only at low frequencies. Every amplifier you have ever measured has a high-frequency cutoff, beyond which the gain falls. Where does this cutoff come from? From the internal capacitances of the transistor itself.

Before we even look at the model, let us see why this is inevitable. A transistor is a piece of doped silicon with reverse-biased and forward-biased junctions sitting inside it. We saw in Chapter 1 that every junction has both depletion capacitance (the dielectric of the depletion region behaving as a parallel-plate capacitor) and diffusion capacitance (stored minority carriers acting like a charge reservoir). Add the gate-oxide capacitance in a MOSFET, the wire-bond inductances in the package, the parasitic substrate caps. There is no way to make a real device with zero internal capacitance, and those caps have to charge and discharge as the input signal swings, which takes current that has to come from somewhere.

Plumbing analogy. Think of the transistor as a valve with three bulky pipes connected to it. Each pipe has a balloon stretched over an internal port. To open or close the valve you have to inflate or deflate the balloons, and that takes time. At low frequencies you have plenty of time to fill them, so the valve responds smoothly. At high frequencies the input signal is sloshing back and forth so fast that all your incoming current is being eaten by the balloons, and almost none is left to actually move the valve plate. Bandwidth dies because the balloons (the device capacitances) demand all the current.

1.1 The hybrid-π model: the modern standard

A more complete BJT small-signal model, valid up through GHz frequencies, is the hybrid-π model:

                          C_µ
                          ──||──
                         /        \
   B ─[r_b']─*─[r_π]─*──*──────────*── C
             │      │              │
             │      C_π             │ r_o
             │      │  g_m·v_be     │
             │      │     ↓         │
             └──────┴─────┴─────────┴── E

Component by component:

• $r_{b'}$ (base spreading resistance): bulk silicon resistance from the external base lead to the active base region. A few tens of ohms on a typical small-signal NPN, irrelevant at low frequency, very relevant at GHz.
• $r_\pi$: small-signal dynamic resistance from base to emitter, looking into the device. Equal to $\beta_0 / g_m$ at low frequency. For a 2N3904 at 1 mA bias: roughly 2.5 kΩ.
• $g_m$ (transconductance): how much collector current changes per volt change in $V_{BE}$. $g_m = I_C / V_T$, and at room temperature $V_T \approx 26$ mV so $g_m \approx 40 \cdot I_C$ when $I_C$ is in mA and $g_m$ in mS.
• $r_o$ (output resistance): models the slight slope of $I_C$ vs $V_{CE}$ in the active region (the Early effect). Typically tens of kilohms. Vital for accurate gain calculation in cascode and current-mirror loads.
• $C_\pi$ (base-emitter capacitance): about 5 to 30 pF for a typical small-signal transistor at moderate current. Dominated by diffusion capacitance under forward bias, which scales with $I_C$.
• $C_\mu$ (base-collector capacitance): much smaller, about 0.5 to 4 pF. The reverse-biased collector-base junction's depletion capacitance. Falls slightly with reverse bias.

At low frequencies, the capacitors look like opens and the model collapses back to the h-parameter form. At high frequencies, they progressively short out signal paths and the gain falls. The transition between these regimes (somewhere between a few MHz and many GHz, depending on the device) is exactly the bandwidth of the amplifier we build around the transistor.

1.2 The Miller effect: the troublemaker

Here is a non-obvious fact that, once you know it, is enormously important. The capacitance $C_\mu$ from base to collector looks much bigger from the input side than its physical value, because of the gain.

Suppose the gain from base to collector is $-A$ (typical for a CE amplifier, with $A$ between 50 and 200). When the base voltage changes by $\Delta v$, the collector swings by $-A \cdot \Delta v$. So the voltage across $C_\mu$ swings by $\Delta v - (-A \cdot \Delta v) = (1 + A) \Delta v$. The current through $C_\mu$ is therefore

$i_{C_\mu} = C_\mu \cdot \frac{d}{dt}\left[(1 + A)\Delta v\right] = C_\mu (1 + A)\frac{d(\Delta v)}{dt}$

That is exactly the current you would draw from the input if a single capacitor of value

$C_{eq} = C_\mu (1 + A)$

were sitting from the input to ground. For $A = 100$ and $C_\mu = 1$ pF, you get $C_{eq} = 101$ pF, a 100× multiplication. This is the Miller effect, named after John Milton Miller who described it in 1920 while studying vacuum-tube amplifiers.

The consequence: the Miller-multiplied $C_\mu$ at the input dominates the high-frequency rolloff of CE amplifiers. The amplifier's bandwidth is set by the source impedance driving this enlarged input capacitance, usually much lower than the transistor's intrinsic $f_T$ would suggest.

Lever-arm analogy. Imagine a small spring connected through a 100:1 lever between two walls, where the lever amplifies motion of one wall by 100×. To compress the spring by 1 mm at the input side, the lever forces 100 mm of compression at the spring, which feels 100× stiffer than the spring really is. The Miller effect is exactly this: amplification on the output side makes the small base-collector cap feel enormously bigger at the input. The cap does not change. The lever (the gain) makes it act bigger.

Hardware-security tie-in. Miller-multiplied capacitances do not just slow down your amplifier, they also dramatically increase the displacement currents flowing in and out of the input terminal. In an unshielded RF chain, those displacement currents radiate. EM side-channel work on cryptographic ICs has shown that the strongest emissions often come from the input nets of high-gain stages, precisely because Miller multiplication amplifies the apparent capacitive load and turns the input net into an unintentional antenna. Cascode topologies (next section) suppress this, which is one reason secure analog cores prefer them.

1.3 The cascode: the Miller-killer

The standard fix is to add a cascode stage. A cascode is a CE (transconductance) followed immediately by a CB (common-base, low-impedance):

          V_CC
           │
           R_C
           │
           ├──── output v_o
           │
        ───┤
       │   │
       Q2 (CB stage, base AC-grounded)
       │   │
        ───┤
           │  <-- node X: low-swing, sits at ~V_BIAS - V_BE
       ───┤
      │   │
      Q1 (CE stage, transconductance)
      │   │
       ───┤
           │
   v_in ───┤  base of Q1
           │
          R_E
           │
          GND

Q1's collector connects directly to Q2's emitter. Q2's emitter is held at near-constant voltage because CB has very low input impedance ($\approx 1/g_m$). So the collector of Q1 barely swings. With negligible voltage swing on Q1's collector, the voltage across $C_\mu$ of Q1 also barely changes, and the Miller multiplication of $C_\mu$ collapses to nearly nothing. Q2 then converts the collector current of Q1 into a clean output voltage at high impedance.

The cascode is the most-used technique for getting bandwidth out of high-gain amplifiers. Inside every modern op-amp's input stage, every RF amplifier, every analog IC that needs gain at high frequency: you will find cascodes. The famous folded-cascode op-amp topology used in audio DACs, biomedical front-ends, and oversampled ADC modulators is built around exactly this trick.

Real-world example. The input stage of a Texas Instruments OPA2134 (a popular audio op-amp) uses a JFET differential pair feeding a cascode load. The cascode multiplies the output impedance enormously (giving high open-loop gain) while keeping the input pair's drain nodes nearly stationary, killing the Miller multiplication of $C_{gd}$. That single design move is responsible for the op-amp's 130 dB open-loop gain at audio frequencies.

1.4 The transition frequency $f_T$ and gain-bandwidth product

The frequency at which the transistor's short-circuit current gain falls to 1 is called the transition frequency $f_T$:

$f_T = \frac{g_m}{2\pi(C_\pi + C_\mu)}$

This is the headline spec on every BJT datasheet. For a 2N3904: about 300 MHz. For an RF transistor like the BFR93A: 5 GHz. For modern silicon-germanium HBTs in the front-end of millimeter-wave radios: 200 to 500 GHz, with a few research devices clearing 700 GHz.

The current-gain rolloff above the so-called beta cutoff frequency $f_\beta = f_T / \beta_0$ is often more relevant in practice, because that is where $\beta(f)$ starts dropping at 20 dB/decade. For a transistor with $\beta_0 = 200$ and $f_T = 300$ MHz, $f_\beta = 1.5$ MHz. Below 1.5 MHz the small-signal current gain is essentially $\beta_0$. Above it, the current gain rolls off, and by 300 MHz it is 1.

For a real amplifier with finite source and load impedances, the high cutoff is given by:

$f_H \approx \frac{1}{2\pi R_{eff}\,(C_\pi + C_\mu(1+A))}$

where $R_{eff}$ is the effective source impedance driving the base. The Miller multiplication of $C_\mu$ shows up explicitly in the parenthesized capacitance.

The conservation law worth memorizing: gain × bandwidth ≈ $f_T$ for a single-pole amplifier. Higher gain means lower bandwidth. Trade one for the other. We will see this conservation law come back (in disguise) when we wrap feedback around the amplifier in section 3.

1.5 FETs at high frequency

Same story, different cap names. The FET has $C_{gs}$ and $C_{gd}$ in place of $C_\pi$ and $C_\mu$. The Miller effect on $C_{gd}$ in a common-source amplifier is exactly analogous to the BJT's Miller effect on $C_\mu$. The fix is again the cascode, this time CS-CG (common-source feeding common-gate).

MOSFETs at modern process nodes have $f_T$ above 200 GHz, and the bandwidth of integrated amplifiers is more often limited by routing capacitance, active area, and the load you actually drive than by the transistor itself.

A practical $f_T$ for an FET is

$f_T = \frac{g_m}{2\pi(C_{gs} + C_{gd})}$

mirroring the BJT formula. The $g_m$ of a MOSFET is set by $g_m = \sqrt{2\,\mu_n C_{ox}\,(W/L)\,I_D}$, which has the awkward consequence that $g_m$ scales only as $\sqrt{I_D}$ in saturation (whereas a BJT's $g_m$ scales linearly with $I_C$). To get high $g_m$ from a MOSFET you bias it harder, widen the channel, or shrink the gate length, and there are tradeoffs in each direction.