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section 7 of 114 min read

7. The FET: A Different Kind of Transistor

So far, every device we have looked at uses both electrons and holes — they are bipolar. The FET (Field-Effect Transistor) is unipolar: only one type of carrier. This makes it simpler in many ways, and its enormous input impedance (no current draw at the gate at DC) is what makes modern digital electronics low-power.

7.1 The JFET: old but illustrative

The junction FET is a piece of n-type (or p-type) silicon — the channel — with reverse-biased pn junctions on either side acting as gates. As you increase the reverse bias on the gate, the depletion region in the channel widens (since reverse bias widens any depletion region), squeezing the channel narrower:

plaintext
   source ────┐n-channel┌──── drain
              │         │
            [gate]   [gate]   (reverse-biased
              │         │     pn junctions)
              ↓ widens depletion ↓
              squeezing the channel

A wider gate depletion → narrower conduction channel → higher resistance → less drain current. Pinch the channel off completely and the FET is "off."

The crucial point: the gate is reverse-biased, so it draws almost no current (just the tiny reverse leakage of a pn junction). Voltage controls current with no power dissipation at the input — exactly what you want.

JFETs are mostly historical now, but the concepts (channel, depletion, pinch-off) carry over directly.

7.2 The MOSFET: the workhorse of modern electronics

The MOSFET (Metal-Oxide-Semiconductor FET) replaces the reverse-biased pn junction gate with an insulated gate — a thin layer of silicon dioxide (or, in modern chips, hafnium oxide) between the metal/polysilicon gate electrode and the silicon channel. Now the gate is capacitively coupled to the channel.

plaintext
              gate
              (poly or metal)

              SiO₂ (or HfO₂)
              ─────────────
   source ─[N+]│           │[N+]── drain
              │  channel  │
              │  region   │
            ──┴───────────┴───── p-substrate

Apply a positive voltage to the gate (relative to the substrate). The gate's positive charge attracts electrons up to the surface of the silicon, just under the oxide. If the gate voltage is high enough — above the threshold voltage VTV_T — enough electrons accumulate to form a thin n-type "inversion layer" connecting source and drain. Now drain-to-source current can flow.

Increase VGSV_{GS} above VTV_T further and the inversion layer thickens, the channel resistance drops, and more current flows. So the gate voltage controls the channel conductance.

This is an n-channel MOSFET (NMOS). The complementary structure with all dopants reversed is PMOS.

Operating regions:

  • Cutoff (VGS<VTV_{GS} < V_T): no inversion layer, no current. Off.
  • Triode/linear/ohmic (VGS>VTV_{GS} > V_T, VDS<VGSVTV_{DS} < V_{GS} - V_T): channel acts like a voltage-controlled resistor. Used as analog switches.
  • Saturation (VGS>VTV_{GS} > V_T, VDSVGSVTV_{DS} \geq V_{GS} - V_T): channel is "pinched off" near the drain. Drain current depends only on VGSV_{GS}, not VDSV_{DS} (in first approximation). Used for amplification.

The drain current in saturation:

ID=12μnCoxWL(VGSVT)2I_D = \frac{1}{2}\mu_n C_{ox}\frac{W}{L}(V_{GS} - V_T)^2

where WW is channel width, LL is channel length, μn\mu_n is electron mobility, CoxC_{ox} is gate-oxide capacitance per unit area. The (VGSVT)2(V_{GS} - V_T)^2 shape is square law, in contrast to the BJT's exponential.

Square-law nonlinearity can be tamed by feedback or canceled by clever circuit design (the differential pair, used in op-amps).

7.3 Why MOSFETs took over

Compared to BJTs:

  • Insulated gate: no DC current at the input. Input impedance is essentially infinite (just the small gate leakage). This is gigantic — you can drive the input from sensors, photodiodes, anything weak.
  • Easier to scale: Modern processes can pack billions of MOSFETs on a chip. BJTs are harder to make smaller because of the doping-profile constraints.
  • CMOS (combining NMOS and PMOS): a digital gate built from a complementary pair has no static current (one of the pair is always off). So digital chips with billions of gates dissipate power only when switching. This is the entire reason your laptop does not melt.

The disadvantages: MOSFETs have lower transconductance per current than BJTs, and lower precision in matched pairs. So precision analog circuits often still use BJTs (or BiCMOS — both on one chip). But for digital and most of analog, MOSFETs win.

7.4 FET parameters

  • Transconductance gm=ID/VGSg_m = \partial I_D / \partial V_{GS} — analogous to BJT's gmg_m but typically smaller for the same current. For a MOSFET in saturation: gm=2μnCox(W/L)IDg_m = \sqrt{2 \mu_n C_{ox}(W/L) I_D}. So gmIDg_m \propto \sqrt{I_D}, in contrast to BJT's gmIDg_m \propto I_D.
  • Output resistance ro=VDS/IDr_o = \partial V_{DS}/\partial I_D — modeling channel-length modulation. Generally higher than BJT's.
  • Threshold voltage VTV_T — the gate voltage where the channel just turns on. Modern processes have VTV_T around 0.3–0.7 V.