10.1 Active loudspeaker crossover
- Audio in (low-impedance line level).
- Op-amp buffer (TL072) isolates source.
- Active filter splits the signal into low/mid/high bands. Linkwitz-Riley fourth-order is the standard, implemented as cascaded Sallen-Key sections (typically with OPA1612 for high-quality, low-distortion stages).
- Each band drives its own dedicated power amplifier.
- Each amp drives its own speaker (woofer, midrange, tweeter).
The advantage over passive crossovers (LC components in series with the speakers): no big lossy inductors, lower distortion, custom shaping that is hard to do passively. Modern studio monitors and audiophile speakers all use active crossovers.
10.2 ECG (electrocardiogram) front-end
- Three-lead pickup: very low-amplitude differential signal (a few millivolts of heart activity, plus 100 mV of common-mode mains pickup).
- Instrumentation amp (AD620 or LT1167): high CMRR (110 dB) kills the mains hum on the differential signal.
- Driven-right-leg circuit: an active common-mode rejection technique that drives the patient's right-leg electrode with the inverted common-mode signal, killing the residual hum.
- High-pass filter at ~0.5 Hz: kills DC drift from skin polarization.
- Low-pass filter at ~150 Hz: kills muscle (EMG) noise.
- Notch filter at 50 or 60 Hz: kills any mains hum that survived stages 2 and 3.
- ADC (typically a 24-bit sigma-delta like the ADS1294, designed specifically for biopotentials): clean digital output.
- Display + heart-rate computation in software.
This is essentially every wearable heart-rate monitor, every hospital telemetry system, every Apple Watch ECG.
10.3 CPU clock multiplier
- External crystal at 25 MHz.
- On-die PLL locks at 4 GHz (multiplier = 160).
- Output drives the CPU core clock tree.
- Spread-spectrum option: modulates the VCO slightly (~30 kHz) to spread emissions and reduce EMI.
Without PLLs you cannot reach GHz from a quartz crystal. The PLL is typically the second-noisiest analog circuit on a CPU die, and its phase noise sets the floor on how fast the digital logic can be clocked reliably.
10.4 Side-channel power-trace capture
- Shunt resistor (a few ohms) in series with the chip's power pin.
- Differential probe (often an active probe like a Tek TAP1500): high CMRR, high bandwidth.
- Instrumentation amp with gain 100 or 1000.
- Anti-aliasing filter to block harmonics above the digitizer's Nyquist.
- High-speed ADC (sigma-delta, pipelined, or flash; typically 12 to 16 bits at 100 MSPS to 5 GSPS).
- Acquisition memory: deep enough to capture the entire crypto operation.
- Offline analysis (DPA, CPA, or template attacks).
Every component in this chain is from this chapter.