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section 5 of 132 min read

5. Pentium and Beyond, Briefly

5.1 Pentium (1993): superscalar

Two integer pipelines (U and V) that could execute two instructions per cycle if they were a "compatible pair." Branch prediction. Wider buses. MMX (1996 refresh) added 64-bit SIMD integer instructions for multimedia.

5.2 Pentium Pro / II / III: out-of-order execution

Internally translates x86 instructions into RISC-like micro-ops (μops), executes them in parallel out of order on multiple execution units, retires them in order. This is the architectural model every high-performance x86 has used since 1995. SSE (1999) added 128-bit floating-point SIMD.

5.3 Pentium 4: deep pipeline, hyperthreading

20+ stage pipeline (later 31-stage), aiming for 4+ GHz clocks. Introduced Hyper-Threading (Intel's name for SMT — Simultaneous Multi-Threading), where a single core appears to the OS as two logical CPUs sharing execution resources. The deep pipeline turned out to be a bad bet (high branch-misprediction penalty); Intel pivoted back to the Pentium-Pro lineage with Core.

5.4 Core, Core 2, x86-64

The Core line (2006) returned to a shorter, more efficient pipeline. Multi-core became standard (2 cores in 2006, today 8–32+ on consumer parts). x86-64, originally proposed by AMD as AMD64 (2003) and adopted by Intel as Intel 64, extended the architecture to 64-bit:

  • Sixteen 64-bit GPRs (RAX, RBX, ..., R8 through R15).
  • 64-bit virtual addresses (current implementations use 48 or 57 bits).
  • Removal of segmentation in long mode.
  • Dropping legacy modes you no longer need.

Today's x86: 8–32+ cores, AVX/AVX-512 SIMD, hardware virtualization (VT-x), security extensions (SGX, MPK, CET), TDX/SEV memory encryption. All built on the foundation the 8086 laid 48 years ago.

Security angle. The historical thread of x86 — segmentation, real mode at boot, A20 gate, SMM (System Management Mode), Intel ME (Management Engine) — accumulates a lot of legacy machinery. Each layer is a potential attack surface. Researchers have found bugs in SMM that allow ring -2 code execution (above the kernel). Intel ME has had remote-exploitable bugs. The boot path from 16-bit real mode through protected mode through long mode is a prime target for firmware attacks. Ancient code still matters.