2. Non-linear Wave Shaping: Diodes and Transistors // Pulse and Digital Circuits // bhaswanth

The next class of circuits is what happens when we add nonlinear elements (diodes and transistors as switches) to the linear toolkit. Now the input-output relationship has corners and saturations. This is the world of clippers, clampers, level shifters, and the boundary between analog and digital.

2.1 Clippers: chopping signals at thresholds

A clipper removes the part of the input above (or below) some threshold. The diode is the workhorse: it conducts in one direction and blocks in the other, naturally creating a corner in the transfer characteristic.

Series clipper. A diode in series with the input, with a load resistor to ground:

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   Vin ──[D]──*── Vout
              |
             [R]
              |
             GND

When the diode is forward-biased (input positive enough to overcome the 0.7 V drop), it conducts and the output follows the input minus 0.7 V. When reverse-biased, no current flows and the output sits at zero. The result: the negative half of the input is clipped off; only the positive part (above 0.7 V) makes it through.

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  Vin (sine):                     Vout (series clipper):
   ╱╲      ╱╲                     ╱──╲
  ╱  ╲    ╱  ╲                   ╱    ╲
 ╱    ╲  ╱    ╲                 ╱      ╲
        ╲╱        ──────────── 0 ─────── ──────
                                       (no negative part)

Shunt clipper. A diode in parallel with the output, anode to ground:

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   Vin ──[R]──*── Vout
              |
              D (cathode up)
              |
             GND

When the input drives the output above 0.7 V, the diode conducts and clamps the output to 0.7 V (since the diode's drop is fixed). Above this level, the input continues to rise but the output stays pegged. Below 0.7 V, the diode is off and the output follows the input through R.

The shunt clipper is more common because the output impedance is low when clipping (you're at the diode), making it good for driving subsequent stages.

Biased clipper. Add a battery (or a DC reference) in series with the diode to set the threshold to whatever you want. Want to clip at 3 V? Put a 2.3 V reference in series with a diode (since 2.3 + 0.7 = 3). Now the output is held at 3 V whenever the input tries to rise above it, and follows the input otherwise.

Two-level clipper. Two diodes back-to-back, each with its own bias, define an upper and a lower clip level. The output is held between the two levels; anything outside is chopped flat. This is essentially what's inside every modern IC's input pin: two ESD-protection diodes, one to VDD and one to GND, that clip any input excursion outside the rails.

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   ESD protection at every input pin:
   
   PIN ─────*──── (input to internal circuit)
            |
        ┌───*───┐
        │       │
        D1      D2     D1: anode to PIN, cathode to VDD
        │       │      D2: anode to GND, cathode to PIN
       VDD     GND

If the pin sees a +1000 V ESD spike, D1 turns on and clamps the pin to VDD + 0.7 V, dumping the spike's current into the supply rail (where bulk capacitance absorbs it). If the pin sees -1000 V, D2 clamps it to GND - 0.7 V. Both diodes are in every CMOS, TTL, and microprocessor input ever made.

Practical uses for clippers:

ADC input protection as just described.
Audio overdrive and distortion pedals. Guitar pedals like the Tube Screamer use diodes to clip the audio signal asymmetrically, generating harmonics that sound "warm." This is clipping as a feature, not a defect.
Pulse-amplitude limiters in receivers. A hard clipper before the demodulator removes noise spikes that exceed the wanted signal, improving signal-to-noise.
Automatic gain control in radios. Clip the strongest peaks to avoid overloading downstream stages.
Schottky-clamped TTL logic. Section 6 shows how a Schottky diode placed across a transistor's base-collector junction clips the saturation excursion, dramatically speeding up turn-off.

2.2 Clampers: shifting DC levels

A clamper shifts a signal's DC level without changing its shape. The simplest form: a series capacitor and a shunt diode.

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   Vin ──[C]──*── Vout
              |
              D (anode to ground for negative clamper)
              |
             GND

Walk through the operation. Suppose the input is a sine wave of $\pm V_p$ (peak amplitude $V_p$ , zero average). When the input first goes negative, the diode conducts and pulls the right side of the cap to ground (well, to about 0.7 V). The cap charges up to whatever the input minimum was, with the left plate negative and right plate positive. After the first cycle, the cap holds a charge of $-V_p$ on its left plate.

Now the diode is reverse-biased on every subsequent cycle (assuming a high-impedance load that can't drain the cap). The cap acts as a DC battery in series with the input. The output is then $V_{in} - (-V_p) = V_{in} + V_p$ . Result: the output is the original sine wave shifted up by $V_p$ , so its lowest point now sits at zero and its highest at $2V_p$ .

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  Vin:                Vout (negative clamper):
   ╱╲      ╱╲             ╱╲       ╱╲
  ╱  ╲    ╱  ╲          ╱  ╲    ╱  ╲
       ╲╱        →    ╱        ╲╱      ╲       ←-- 0 V
   ─Vp──Vp─                   2Vp

Clamping circuit theorem. In a clamper with an ideal diode and high-impedance load, the area above the clamp level exactly equals the area below it (for any periodic input). This comes from charge balance on the cap: the cap can't be net-charged by a periodic input in steady state, so the average current must be zero, which forces the area balance.

Used in:

Old-school TV horizontal sync-tip clamping. Every line of video has a sync pulse below black; clamping locks the sync tip to a known reference voltage so that the detector knows where black is.
DC restoration in level-coded video signals. Same idea, broader application.
Voltage doublers. A clamper followed by a peak detector outputs $2V_p$ from an AC input of amplitude $V_p$ . Stack multiple stages to get voltage triplers, quadruplers, and so on: Cockcroft-Walton multipliers used to charge cathode-ray tubes and X-ray sources.
Some receiver AGC schemes. Clamp the strongest carrier to a known level, then measure deviations.
Hardware-security tie-in: glitch-injection coupling networks. Some glitch-injection setups use a clamping diode and series cap to deliver a brief negative-going voltage pulse onto a chip's supply pin. The cap couples the pulse, the diode prevents the pulse from disturbing the rest of the supply.

2.3 Transistor switching: speed limits and storage time

In Chapter 1 we used transistors as analog amplifiers, in the active region. In digital and pulse circuits we more often use them as switches: either fully on (saturated) or fully off (cutoff). The active region is just the brief transit between the two.

When a BJT switches between on and off, the transition has four phases. Picture an ideal turn-on followed by an ideal turn-off:

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  V_BE pulse:      ┌──────────────────────┐
                   │                      │
              ────┘                      └──────
                  
  I_C response:        ┌────────────┐
                      ╱│            │╲
                     ╱ │            │ ╲
                    ╱  │            │  ╲
                   ╱   │            │   ╲
              ───*    │            │   *────
                  td   tr           ts  tf
                  
   td = delay time
   tr = rise time
   ts = storage time (kicks in only when turning off)
   tf = fall time

Delay time $t_d$ . From the input edge, $V_{BE}$ has to charge up to about 0.7 V before any collector current starts. The base-emitter junction's diffusion capacitance (which we met in Chapter 1) sets this delay. Typical: 5-50 ns.
Rise time $t_r$ . Once conducting, the collector current rises. This is set by the speed at which the base region fills with charge enough to support the demanded collector current. Typical: tens of ns.
Storage time $t_s$ (only when turning off). Here's the surprise. When the BJT was fully saturated, the base region was flooded with stored charge, far more than the active region needs. Now the input wants to turn it off. But the stored charge can't disappear instantly; it has to recombine or be swept out. During this storage time, the transistor still conducts at full collector current even though $V_{BE}$ has dropped. Storage time can be hundreds of ns and is often the dominant turn-off delay.
Fall time $t_f$ . Once the stored charge is gone, the collector current falls as the base region empties.

Why does storage time exist? When the transistor is in saturation, the collector-base junction is forward-biased (not reverse-biased as in the active region). Forward bias means minority carriers are being injected from base into collector and from collector into base. Both junctions are loaded with stored minority carriers, the same diffusion capacitance phenomenon as a forward-biased diode. To turn the transistor off, you have to first sweep out (or recombine) all this stored charge. Until it's gone, the device behaves as if still conducting, regardless of what $V_{BE}$ is doing.

Solutions to speed up turn-off:

Schottky-clamped transistors. Place a Schottky diode from base to collector. Whenever the BJT tries to enter saturation (collector going below base), the Schottky catches it and shunts the excess base current directly to the collector, preventing deep saturation and the stored charge that comes with it. This is the trick used in the 74S TTL family (and its evolutions like 74LS, 74AS, 74F): the entire family's speed advantage comes from preventing storage time.
Speed-up capacitor. A small capacitor (a few pF) in parallel with the base resistor injects extra current during the input edge, kicking the transistor in or out of saturation faster. Common in classic discrete-transistor multivibrators.
Active pull-down. A second transistor that quickly grounds the base during turn-off, sweeping out stored charge much faster than a passive resistor would.
Reverse drive. Drive the base negative during turn-off to actively reverse-bias the base-emitter junction.

The same physics applies, with appropriate modifications, to MOSFETs. For MOSFETs the relevant "stored charge" is the gate charge (the charge needed to invert the channel), and turn-off speed is limited by how fast the driver can sink the gate charge through the gate resistance.

2.4 Saturation parameters

When fully on, a BJT's $V_{CE(sat)}$ is typically 0.2 V (much less than the active region's 0.7 V drop across $V_{CE}$ ). The forced current gain $h_{FE(sat)} = I_C/I_B$ in saturation is much smaller than the nominal $\beta$ , usually deliberately so, because overdriving the base ensures the transistor stays well into saturation despite parameter variation.

Designers often spec a saturation overdrive factor of 5-10x: if the actual collector current you need divided by the spec sheet $\beta$ would say "use 100 µA of base," you provide 500 µA to 1 mA instead. This guarantees saturation across temperature and process variations, at the cost of more storage time when you turn it off.

2.5 The Schmitt trigger: turning fuzzy into clean

Real-world signals often look noisy, slowly-changing, or contaminated with interference. A thermistor's voltage as a room slowly warms. A button being pressed (with bouncing contacts). A microphone's output triggering a level detector. If you feed such a signal into a regular comparator (just a comparison against a single threshold), the output flips back and forth rapidly as the input crosses the threshold, with every speck of noise causing a transition. The result: dozens of spurious edges instead of one clean transition.

The Schmitt trigger has two thresholds, an upper trip point (UTP) and a lower trip point (LTP), instead of one. It also has memory of which state it's currently in.

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   Vout
     |
   high _________________
     |                  ╲
     |                   ╲ (output stays high until input falls below LTP)
     |  ____________      ╲___________ 
     |              ╲                   
     |               ╲ (output stays low until input rises above UTP)
   low_________________________________________ Vin
                LTP   UTP
                
   The "hysteresis loop": output depends on history, not just current input

The output flips up only when the input rises above UTP. Once high, the output stays high even if the input drops a bit, until it falls below LTP. Then it flips down and stays down until the input rises above UTP again. The gap UTP - LTP is the hysteresis voltage.

Inside any noise band smaller than the hysteresis, the output stays where it was, completely immune to that noise.

Deriving the Schmitt thresholds. The classic op-amp Schmitt trigger uses positive feedback:

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                     R1
   Vin ──[R_in]──+── ⊳── Vout
                 |  ⊳
                 |  
              ───*  (op-amp inverting input grounded through R_in,
                   noninverting input = (Vout × R2/(R1+R2)) feedback)
                 R2
                 |
                GND

When $V_{out}$ is at its positive saturation (say $+V_{sat}$ ), the noninverting input sits at $V_{sat} \cdot R_2/(R_1+R_2) =$ UTP. The output flips low when $V_{in}$ rises above this. When $V_{out}$ is at $-V_{sat}$ , the noninverting input sits at $-V_{sat} \cdot R_2/(R_1+R_2) =$ LTP. The hysteresis is $2V_{sat} \cdot R_2/(R_1+R_2)$ .

Choose $R_1$ and $R_2$ to set the hysteresis to whatever you need. Typical: 100 mV to a few volts, depending on how noisy the input is.

Where Schmitt triggers live:

Switch debouncing. A mechanical switch's contacts bounce open/closed for several milliseconds when first making contact. An RC followed by a Schmitt trigger smooths the bouncing into a single edge. Every keyboard, every elevator button, every car door switch uses this.
Sine-to-square conversion. A slowly-varying sinusoid through a Schmitt becomes a clean square wave at the same frequency. Used in clock recovery and frequency-to-digital interfaces.
Voltage threshold detection. "Battery low" indicator that does not chatter near the threshold.
Logic regenerators. A degraded digital signal (after passing through long cables, ringing, EMI) can be cleaned up with a Schmitt-trigger inverter, common in long-cable interfaces.
The 7414 chip is a hex Schmitt-trigger inverter; the 74132 is a quad NAND Schmitt; the 40106 is the CMOS Schmitt-trigger inverter. Every digital designer keeps a few in stock.

Hardware-security tie-in. Schmitt triggers are themselves a defense against glitch attacks: a chip's reset input, when fed through a Schmitt, ignores brief glitches that don't span the full hysteresis. But Schmitt thresholds can be attacked: by carefully timing a fault-injection pulse to coincide with the moment the Schmitt is deciding, an attacker can sometimes force the threshold to flip the wrong way. Modern secure microcontrollers therefore use redundant Schmitt circuits and majority voting on critical inputs.